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26 lines
756 B
26 lines
756 B
//VerilogA for passive,spliter3,veriloga
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`include "constants.vams"
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`include "disciplines.vams"
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module spliter3(Ipow,Iphase,Ilam,Opow1,Ophase1,Olam1,Opow2,Ophase2,Olam2,Opow3,Ophase3,Olam3);
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parameter real r1 = 0.3333 from [0:1];
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parameter real r2 = 0.3333 from [0:1];
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parameter real r3 = 0.3333 from [0:1];
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input Ipow,Iphase,Ilam;
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output Opow1,Ophase1,Olam1,Opow2,Ophase2,Olam2,Opow3,Ophase3,Olam3;
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electrical Ipow,Iphase,Ilam,Opow1,Ophase1,Olam1,Opow2,Ophase2,Olam2,Opow3,Ophase3,Olam3;
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analog begin
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V(Opow1) <+ V(Ipow)*r1;
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V(Opow2) <+ V(Ipow)*r2;
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V(Opow3) <+ V(Ipow)*r3;
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V(Ophase1) <+ V(Iphase);
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V(Ophase2) <+ V(Iphase);
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V(Ophase3) <+ V(Iphase);
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V(Olam1) <+ V(Ilam);
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V(Olam2) <+ V(Ilam);
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V(Olam3) <+ V(Ilam);
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end
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endmodule
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