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29 lines
735 B
29 lines
735 B
//VerilogA for passive,chifilterbasic,veriloga
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`include "constants.vams"
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`include "disciplines.vams"
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module chifilterbasic(Ipow,Iphase,Ilam,Opow,Ophase,Olam);
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parameter real centerfreq = 1G;
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parameter real bandwidth = 0 from [0:inf);
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parameter real loss = 0 from [0:1];
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input Ipow,Iphase,Ilam;
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output Opow,Ophase,Olam;
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electrical Ipow,Iphase,Ilam,Opow,Ophase,Olam;
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real opow,freq;
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analog begin
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freq=`P_C/V(Ilam);
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if (freq < centerfreq+bandwidth/2 && freq > centerfreq-bandwidth/2) begin
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opow = V(Ipow);
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end
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else begin
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opow = V(Ipow)*loss;
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end
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V(Opow) <+ opow;
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V(Ophase) <+ V(Iphase);
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V(Olam) <+ V(Ilam);
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end
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endmodule
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