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64 lines
1.8 KiB
64 lines
1.8 KiB
//VerilogA for amp,edfa,veriloga
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//单模，单正向
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//后续更新
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`include "constants.vams"
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`include "disciplines.vams"
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`define NUM_INT 10000
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module edfa(Ipow,Iphase,Ilam,Opow,Ophase,Olam);
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parameter integer alpha_use_dBm = 1 from [0:1];
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parameter real length = 6 from (0:inf);
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parameter real sig_a = 3.86e-25 from (0:inf); //absorption, 1550nm
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parameter real sig_e = 4.27e-25 from (0:inf); //emission, 1550nm
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parameter real tau = 10.0e-3 from (0:inf);
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parameter real gamma = 0.67 from (0:1);
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parameter real nEr = 2.5e24 from (0:inf);
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parameter real beff = 1.5e-6 from (0:inf);
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parameter real bgloss = 0.03 from [0:inf);
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parameter real bandwidth = 0.0 from [0:inf);
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input Ipow, Iphase, Ilam;
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output Opow, Ophase, Olam;
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electrical Ipow, Iphase, Ilam, Opow, Ophase, Olam;
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real Pk;
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real Pase = 0;
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real dz;
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real dPk, dPase;
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real lk;
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real f2;
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integer i;
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real freq;
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real df;
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analog begin
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freq = `P_C/V(Ilam);
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dz = length/`NUM_INT;
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Pk=V(Ipow);
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if (alpha_use_dBm == 0) begin
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lk=bgloss;
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end
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else if (alpha_use_dBm == 1) begin
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lk=bgloss/10.0*ln(10);
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end
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for (i=0; i<`NUM_INT; i=i+1) begin
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f2=tau*(Pk+Pase)/(`M_PI*beff*beff*`P_H*freq)*gamma*sig_a/(1+tau*(Pk+Pase)/(`M_PI*beff*beff*`P_H*freq)*gamma*(sig_a+sig_e));
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// $display("f2=%e",f2);
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dPk = (sig_e*f2-sig_a*(1-f2))*gamma*nEr*Pk-lk*Pk;
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// $display("dPk=%e",dPk);
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dPase = (sig_e*f2-sig_a*(1-f2))*gamma*nEr*Pase+sig_e*gamma*nEr*f2*2.0*`P_H*freq*bandwidth-lk*Pase;
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// $display("dPase=%e",dPase);
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Pk = Pk + dPk*dz;
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Pase = Pase + dPase*dz;
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end
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V(Opow) <+ Pk + Pase;
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V(Olam) <+ V(Ilam);
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V(Ophase) <+ V(Iphase);
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end
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endmodule
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