//VerilogA for passive,chifilterbasic,veriloga

`include "constants.vams"
`include "disciplines.vams"

module chifilterbasic(Ipow,Iphase,Ilam,Opow,Ophase,Olam);
    parameter real centerfreq = 1G;
    parameter real bandwidth = 0 from [0:inf);
    parameter real loss = 0 from [0:1];

    input Ipow,Iphase,Ilam;
    output Opow,Ophase,Olam;
    electrical Ipow,Iphase,Ilam,Opow,Ophase,Olam;

    real opow,freq;

    analog begin
		freq=`P_C/V(Ilam);
        if (freq < centerfreq+bandwidth/2 && freq > centerfreq-bandwidth/2) begin
            opow = V(Ipow);
        end
        else begin
            opow = V(Ipow)*loss;
        end
        V(Opow) <+ opow;
        V(Ophase) <+ V(Iphase);
		V(Olam) <+ V(Ilam);
    end
endmodule